AMD Versal TR Devices Announced with Backside Physical Attack Protection

AMD has officially announced the new AMD Versal™ tamper-resistant (TR) devices, designed to protect security-critical information against sophisticated physical attacks while delivering the high-performance heterogeneous processing capabilities of the AMD Versal™ AI Edge Series Gen 2. Aimed at demanding markets such as defense, critical industrial infrastructure, data center networking, and fintech, AMD Versal TR Devices aim to eliminate the need for complex, custom mechanical enclosures and auxiliary ASICs. You can explore more architectural details directly on the official AMD Portal.

1. Industry-First Backside Physical Attack Protection

Protecting sensitive information from physical tampering is a top priority across modern embedded applications. Traditionally, customers building high-security systems relied on custom in-house solutions using mechanical enclosures and auxiliary ASICs, which introduced high development costs, specialist resource requirements, and re-spin risks.

• Sensor-Based Protection Die: AMD Versal TR Devices represent the industry’s first adaptive SoC or FPGA-based solutions featuring built-in protection against physical attacks on the silicon backside.

• 3D Active-on-Active Technology: A sensor-based protection die is bonded directly to the main compute die using advanced 3D technology, shielding the entire backside of the device.

• Tamper Prevention: If the protection die is tampered with or removed, the sensor instantly detects the physical breach and prevents the device from booting, successfully securing sensitive cryptographic keys, user intellectual property, and system data.

2. Heterogeneous Computing & Advanced Security Architecture

Combining hardware acceleration with robust cryptographic safeguards, AMD Versal TR Devices integrate multiple layers of physical and cryptographic protection without compromising overall system performance, size, weight, power (SWaP), or time to market:

• Post-Quantum Cryptography: Expanded hardware acceleration supporting the Module-Lattice-Based Digital Signature Algorithm (ML-DSA) and Stateless Hash-Based Digital Signature Algorithm (SLH-DSA).

• Hybrid Boot & Key Vaults: Supports hybrid boot flows utilizing multiple signature algorithms alongside Application Security Unit (ASU) key vault enhancements and a new memory element aging sensor (MEAS) for superior cryptographic key protection.

• Enhanced Glitch Detection: Combines improvements to the Versal architecture glitch detector with a new orthogonal glitch detector, offering comprehensive coverage for voltage glitches occurring simultaneously across two voltage rails.

• Processing Power: Powered by Versal AI Edge Series Gen 2 adaptive SoCs, integrating Arm® CPUs, AI Engines, programmable logic, and hard IP to deliver up to 229,000 DMIPS of scalar compute, 369 INT8 TOPS, and 543,000 LUTs.

AMD Versal TR Portfolio Overview

3. Development Path, Sampling, and Availability

To streamline product development and reduce time-to-market, AMD Versal TR Devices share a footprint-compatible standard counterpart available in the market today.

• Seamless Design Transition: Customers can begin designing and evaluating their high-performance applications on select standard Versal AI Edge Series Gen 2 devices today without rerunning synthesis or place-and-route, later transitioning to the tamper-resistant TR counterpart with minimal effort.

• Sampling & Production Timeline: Initial hardware samples for AMD Versal TR Devices are expected to ship in the second half of 2027, with volume production officially slated for the first half of 2028.

The GadgetXprt Verdict

The introduction of AMD Versal TR Devices marks a significant milestone for high-security embedded systems across multiple industries. By integrating backside physical attack protection and advanced post-quantum cryptography directly into heterogeneous adaptive SoCs, AMD simplifies board design, reduces component count, and saves valuable board space for developers operating in defense, fintech, and critical infrastructure sectors.

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